Designing Secure Processors: A Microarchitectural Perspective
Invited Talk, University of Central Florida, Orlando, FL
Talks and presentations
IvLeague: Side Channel-resistant Secure Architectures Using Isolated Domains of Dynamic Integrity Trees
Talk, New England Hardware Security Day (NEHSD'25), New England, MA
IvLeague: Side Channel-resistant Secure Architectures Using Isolated Domains of Dynamic Integrity Trees
Conference proceedings talk, IEEE/ACM International Symposium on Microarchitecture (MICRO'24), Austin, TX
MetaLeak: Uncovering Side Channels in Secure Memory Architectures Exploiting Metadata
Conference proceedings talk, IEEE/ACM Annual International Symposium on Computer Architecture (ISCA'24), Buenos Aires, Argentina
DeepVenom: Persistent DNN Backdoors Exploiting Transient Weight Perturbations in Memories
Conference proceedings talk, IEEE Symposium on Security and Privacy (S&P'24), San Francisco, CA
DeepSteal: Advanced Model Extractions Leveraging Efficient Weight Stealing in Memories
Conference proceedings talk, San Francisco, California, San Francisco, California
D-Shield: Enabling Processor-side Encryption and Integrity Verification for Secure NVMe Drives
Conference proceedings talk, Montreal, QC, Canada, Montreal, QC, Canada
BeKnight: Guarding against Information Leakage in Speculatively Updated Branch Predictor
Conference proceedings talk, San Francisco, California, San Francisco, California
Feasibility and Implication of Remote In-Memory Data Stealing
Talk, University of Delaware, Delaware, USA
R-SAW: New Side Channels Exploiting Read Asymmetry in MLC Phase Change Memories
Conference proceedings talk, Virtual, Virtual
LADDER: Architecting Content and Location-aware Writes for Crossbar Resistive Memories
Conference proceedings talk, Virtual, Virtual
BranchSpec: Information Leakage Attacks Exploiting Speculative Branch Instruction Executions
Conference proceedings talk, Virtual, Virtual